release

System object: hdlverifier.FPGADataReader
Package: hdlverifier

Release control of JTAG interface

Syntax

release(DC)

Description

release(DC) releases system resources of the FPGADataReader System object™, DC, including control of the JTAG interface. Releasing the object allows you to change its properties and input characteristics. While the System object exists and is locked, no other processes can use the JTAG cable.

Input Arguments

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Customized data capture object created using the FPGA Data Capture Component Generator app.