Display overall trigger condition
displayTriggerSettings(DC) displays the signal
value comparisons and logical operator that define the overall trigger condition.
Data capture System
object, specified as an hdlverifier.FPGADataReader System object. You can create this type of System
object by using the FPGA Data Capture Component Generator app.
Capture | FPGA Data Capture
Component Generator | hdlverifier.FPGADataReader
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