configureADCTileClock

Configure output clock frequency of ADC tile

Since R2020b

Syntax

configureADCTileClock(rfDataConverter,tileId,resampleFactor)

Description

configureADCTileClock(rfDataConverter,tileId,resampleFactor) configures the frequency of the output clock of the specified ADC tile for the provided resample factor.

Input Arguments

rfDataConverter — RF data converter

soc.RFDataConverter object

RF data converter, specified as an soc.RFDataConverter object. Via Ethernet, this object connects the host computer to the RF data converter on the connected SoC device. Use the object functions and properties of this object to configure the RF data converter.

tileId — Identifier of RF-ADC tile

0 | 1 | 2 | 3

Identifier of the RF-ADC tile connected to the programmable logic, specified as 0, 1, 2, or 3. Available options for the RF-ADC tile ID vary according to the specified RFSoC device. A tile contains several ADCs, accessible as channels, and several shared timing units, including a clock and PLL.

Data Types: single | double | int8 | int16 | int32 | int64 | uint8 | uint16 | uint32 | uint64

resampleFactor — Resample factor of shared clock for RF-ADC tile

nonnegative integer

Resample factor of the shared clock for the RF-ADC tile, specified as a nonnegative integer.

Data Types: double

Version History

Introduced in R2020b