Resolve Analysis Issues

Occasionally, Simulink^® Design Verifier™ analysis results are incomplete due to issues such as unsupported Simulink software features, including certain MATLAB Function block and Stateflow^® features. You can avoid these issues by constraining data types and leveraging the techniques of Simulink Design Verifier to reduce complexity, such as identifying irrelevant model portions, discovering internal relationships, and reusing intermediate results.

When a model is sufficiently large and complex, an analysis of the model can be slow or incomplete. For best results with large or complex models, use a bottom-up approach to analyze smaller components first. This enables faster iteration and helps isolate issues such as unreachable components in the analysis. If your model uses timers and counters, you might encounter issues such as state explosion or delayed response, so use workarounds to address these complexities. Replace blocks that are not supported for analysis with Simulink Design Verifier functions and customize test vector generation as needed. If the analysis is undecided for certain objectives, apply troubleshooting techniques to understand and resolve the causes.