Leverage target hardware instruction set extensions

Description

Select instruction sets to generate single instruction, multiple data (SIMD) code for target hardware.

Category: Optimization

Settings

Default: SSE2

For all targets:

None — Does not generate SIMD code.

Instruction sets for GRT-based targets:

SSE2

Instruction sets for ERT-based targets:

SSE
SSE2
SSE4.1
AVX
AVX2
FMA
AVX512F

The list of instruction sets for ERT-based targets shows the dependency of the instruction sets, where each instruction set depends on the instruction sets that precede it. The code generator loads the selected instruction set and the instruction sets that it depends on. For example, if you select AVX, the code generator loads AVX, SSE4.1, SSE2, and SSE. If you select SSE2 for a GRT-based target or an ERT-based target, the code generator loads SSE2 and SSE.

Dependency

To use this parameter, you must set Device vendor to Intel, AMD, or Generic and Device type to x86-64 (Windows 64), x86-64 (Linux 64), Athlon 64, or MATLAB Host Computer. If you use MATLAB Host Computer, you can choose only instruction sets that are supported by your computer.