SPICE NIGBT

SPICE-compatible N-Channel insulated gate bipolar transistor

• Library:
• Simscape / Electrical / Additional Components / SPICE Semiconductors

• Description

The SPICE NIGBT block models a SPICE n-type insulated gate bipolar transistor (IGBT).

SPICE, or Simulation Program with Integrated Circuit Emphasis, is a simulation tool for electronic circuits. You can convert some SPICE subcircuits into equivalent Simscape™ Electrical™ models using the Environment Parameters block and SPICE-compatible blocks from the Additional Components library. For more information, see subcircuit2ssc.

This figure shows the equivalent circuit for the SPICE NIGBT block: Equations

Variables for the SPICE NIGBT block equations include:

• Variables that you define by specifying parameters for the SPICE NIGBT block.

• Temperature, T, which is 300.15 K by default. You can use a different value by specifying parameters for the SPICE NIGBT block or by specifying parameters for both the SPICE NIGBT block and an Environment Parameters block. For more information, see Transistor Temperature.

MOSFET Channel Current

This table shows the equations that define the relationship between the MOSFET channel current, Imos, and the gate-source voltage, Vgs.

Applicable Range of Vgs ValuesCorresponding Imos Equation

${V}_{gs}

${I}_{mos}=GMIN*{V}_{ds}*SCALE$

${V}_{ds}\le \frac{{V}_{gs}-VT}{KF}$

${I}_{mos}=SCALE*\left(\frac{KF*KP\left[\left({V}_{gs}-VT\right){V}_{ds}-\frac{KF*{V}_{ds}{}^{2}}{2}\right]}{1+THETA*\left({V}_{gs}-VT\right)}+GMIN*{V}_{ds}\right)$

${V}_{ds}>\frac{\left({V}_{gs}-VT\right)}{KF}$

${I}_{mos}=SCALE*\left(\frac{KP{\left({V}_{gs}-VT\right)}^{2}}{2\left[1+THETA*\left({V}_{gs}-VT\right)\right]}+GMIN*{V}_{ds}\right)$

In these equations:

• Vds is the drain-source voltage.

• VT is the threshold voltage.

• KF is the triode region factor.

• KP is the mosfet transconductance.

• THETA is the transverse field factor.

This table shows the equations that define the relationship between the steady-state collector current, Icss, and the emitter-base capacitance, Qeb.

Applicable Range of Qeb ValuesCorresponding Icss Equation

${Q}_{eb}<0$

${I}_{css}=0$

${Q}_{eb}\ge 0$

${I}_{css}=\left[\left(\frac{1}{1+b}\right){I}_{T}+\left(\frac{b}{1+b}\right)\left(\frac{4{D}_{p}}{{W}^{2}}\right){Q}_{eb}\right]*SCALE$

In these equations:

• $b=\frac{MUN}{MUP}$ is the ambipolar mobility ratio.

• ${D}_{p}=\frac{{K}_{B}T}{q}*MUP$ is the diffusion coefficient for holes.

• $W=WB-{W}_{bcj}$ is the quasi-neutral base width, where:

• WB is the metallurgical base width.

• ${W}_{bcj}=\sqrt{2{\epsilon }_{si}\frac{{V}_{bc}+{V}_{bi}}{q*NB}}$ is the base-collector depletion width.

• Vbc is the base-collector voltage.

• Vbi is the build-in voltage, and it is equal to 0.6 V

This table shows the equations that define the relationship between the steady-state base current, Ibss, and the emitter-base capacitance, Qeb.

Applicable Range of Qeb ValuesCorresponding Ibss Equation

${Q}_{eb}<0$

${I}_{bss}=0$

${Q}_{eb}\ge 0$

${I}_{bss}=\frac{{Q}_{eb}}{TAU}+{\left(\frac{{Q}_{eb}}{{Q}_{B}}\right)}^{2}\left(\frac{4*N{B}^{2}}{n{i}^{2}}\right)JSNE*AREA*SCALE$

In these equations:

• TAU is the ambipolar recombination lifetime.

• JSNE is the emitter saturation current density.

• ni is the intrinsic carrier concentration. At 300 K it is equal to 1.45*1010 1/cm3.

• ${Q}_{B}=qW{N}_{B}*AREA$ is the background mobile carrier base charge, where:

• NB is the base doping.

• AREA is the area of the device.

Bipolar Emitter-Base Voltage

This table shows the equations that define the relationship between the emitter-base voltage, Veb, and the emitter-base capacitance, Qeb.

Applicable Range of Qeb ValuesCorresponding Veb Equation

${Q}_{eb}<0$

${V}_{eb}={V}_{ebj}$

${Q}_{bi}>{Q}_{eb}\ge 0$

${V}_{ebmin}=\mathrm{min}\left({V}_{ebj},{V}_{ebd}\right)$

${Q}_{eb}>{Q}_{bi}$

${V}_{eb}={V}_{ebd}$

In these equations:

• ${V}_{ebj}={V}_{bi}-\frac{{\left({Q}_{eb}-{Q}_{bi}\right)}^{2}}{2qNB{\epsilon }_{si}{A}^{2}}$is the emitter-base depletion voltage.

• Vbi is the build-in voltage.

• ${Q}_{bi}=AREA*\sqrt{2{\epsilon }_{si}qNB*{V}_{bi}}$ is the emitter-base junction build-in voltage.

• ${V}_{ebd}=\frac{kT}{q}\mathrm{ln}\left[\left(\frac{{P}_{0}}{n{i}^{2}}+\frac{1}{NB}\right)\left(NB+{P}_{0}\right)\right]-\frac{{D}_{C}}{{\mu }_{nc}}\mathrm{ln}\frac{{P}_{0}+NB}{NB}$is the emitter-base diffusion voltage.

Anode Current

The anode current is obtained from this equation:

${I}_{T}=\frac{{V}_{ae}}{{R}_{b}}*SCALE,$

where:

• Vae is the applied anode-emitter voltage.

• Rb is the conductivity-modulated base resistance.

This table shows the equations that define the relationship between the conductivity-modulated base resistance, Rb, and the emitter-base capacitance, Qeb.

Applicable Range of Qeb ValuesCorresponding Rb Equation

${Q}_{eb}<0$

${R}_{b}=\frac{W}{q*MUN*AREA*NB}$

${Q}_{eb}\ge 0$

${R}_{b}=\frac{W}{q*{\mu }_{eff}*AREA*{n}_{eff}}$

In these equations:

• μeff is the effective carrier mobility.

• neff is the effective base doping concentration.

• MUN is the electron mobility.

μeff and neff are obtained using these equations:

$\begin{array}{l}{\mu }_{nc}=\frac{1}{\left(\frac{1}{{\mu }_{n}}+\frac{1}{{\mu }_{c}}\right)}\\ {\mu }_{pc}=\frac{1}{\left(\frac{1}{{\mu }_{p}}+\frac{1}{{\mu }_{c}}\right)}\\ {\mu }_{eff}={\mu }_{nc}+\frac{{\mu }_{pc}{Q}_{eb}}{\left({Q}_{eb}+{Q}_{B}\right)}\\ {D}_{c}=2\frac{kT}{q}\frac{{\mu }_{nc}{\mu }_{pc}}{{\mu }_{nc}+{\mu }_{pc}}\\ L=\sqrt{{D}_{c}*TAU}\\ {P}_{0}=\frac{Q}{q*AREA*L\mathrm{tanh}\frac{W}{2L}}\\ {n}_{eff}=\frac{\frac{W}{2L}\sqrt{{N}_{B}^{2}+{P}_{0}^{2}csch\left(\frac{W}{L}\right)}}{arctanh\left[\frac{\sqrt{{N}_{B}^{2}+{P}_{0}^{2}csch\left(\frac{W}{L}\right)}\mathrm{tanh}\left(\frac{W}{2L}\right)}{{N}_{B}+{P}_{0}csch\left(\frac{W}{L}\right)\mathrm{tanh}\left(\frac{W}{2L}\right)}\right]}\\ {\overline{\delta }}_{p}=\frac{{P}_{0}\mathrm{sinh}\left(\frac{W}{2L}\right)}{\mathrm{sinh}\left(\frac{W}{L}\right)}\end{array}$

where:

• μnc is the electron carrier scattering mobility.

• μpc is the hole carrier scattering mobility.

• Dc is the carrier-carrier scattering diffusivity.

• L is the ambipolar diffusion length.

• P0 is the carrier concentration at emitter's end of the base.

• $\overline{{\delta }_{p}}$ is the average carrier concentration in base.

Avalanche Multiplication Current

The avalanche multiplication current is obtained from this equation:

${I}_{mult}=\left(M-1\right)\left({I}_{mos}+{I}_{css}+{I}_{ccer}\right)+M*{I}_{gen},$

where:

• ${I}_{gen}=\frac{SCALE}{TAU}q{n}_{i}AREA\sqrt{2{\epsilon }_{si}\frac{{V}_{bc}}{q{N}_{B}}}$is the collector-base thermally generated current.

• Icss is the steady-state collector current.

• Imos is the MOSFET channel current.

• Iccer is the collector-emitter redistribution current.

This equation defines the relationship between the base-collector voltage, Vbc, and the avalanche multiplication factor, M:

$M=\frac{1}{1-{\left(\frac{{V}_{bc}}{B{V}_{cbo}}\right)}^{BVN}},$

where:

• $B{V}_{cbo}=BVF*5.34e13*N{B}^{-0.75}$is the open-base collector-emitter breakdown voltage.

• BVF is the avalanche uniformity factor.

• BVN is the avalanche multiplication exponent.

Capacitance Model

The gate source capacitance is obtained from this equation:

${Q}_{gs}=CGS*{V}_{gs}*SCALE.$

The drain source capacitance is obtained from this equation:

${Q}_{ds}=q\left(AREA-AGD\right)*NB*{W}_{dsj}*SCALE,$

where Wdsj = Wbcj is the drain-source depletion width.

This table shows the equations that define the relationship between the gate-drain capacitance, Qdg, and the drain-gate voltage, Vdg

Applicable Range of Vdg ValuesCorresponding Qdg Equation

${V}_{dg}+VTD\le 0$

${Q}_{dg}={C}_{gdo}*{V}_{dg}*SCALE$

${V}_{dg}+VTD>0$

${Q}_{dg}=\left[\frac{qNB{\epsilon }_{si}AGD}{COXD}\left(\frac{COXD*{W}_{dgj}}{{\epsilon }_{si}}\mathrm{log}\left(1+\frac{COXD*{W}_{dgj}}{{\epsilon }_{si}}\right)\right)-{C}_{gdo}*VTD\right]*SCALE$

In these equations:

• ${C}_{gdo}=COXD*AGD$ is the gate-drain overlap oxide capacitance.

• Vdg is the drain-gate voltage.

• εsi is the permittivity of silicon.

• ${W}_{dgj}=\sqrt{2{\epsilon }_{si}\frac{\left({V}_{dg}+VTD\right)}{qNB}}$ is the drain-gate overlap depletion width.

• VTD is the Gate-drain overlap depletion threshold, VTD.

• COXD is the Gate-drain oxide capacitance per unit area, COXD.

• AGD is the Gate-drain overlap area, AGD.

• NB is the Base doping, NB.

This equation shows the relationship between the collector-emitter redistribution current, Iccer, and the collector-emitter redistribution capacitance, Ccer:

${I}_{ccer}={C}_{cer}*\frac{d{V}_{ec}}{dt}*SCALE,$

where Vec is the emitter-collector voltage.

This table shows the equations that define the relationship between the collector-emitter redistribution capacitance, Ccer, and the emitter-base capacitance, Qeb.

Applicable Range of Qeb ValuesCorresponding Ccer Equation

${Q}_{eb}>0$

${C}_{cer}=\frac{{Q}_{eb}{C}_{bcj}}{3{Q}_{B}}+{C}_{min}*AREA$

${Q}_{eb}\le 0$

${C}_{cer}={C}_{min}AREA$

In these equations:

• Cbcj is the base-collector depletion capacitance.

• ${Q}_{B}=qW{N}_{B}*AREA$ is the background mobile carrier base charge.

The implicit emitter-base capacitor current is obtained from this equation:

${I}_{qeb}=\frac{d{Q}_{eb}}{dt}*SCALE.$

Transistor Temperature

You can use these options to define transistor temperature, T:

• Fixed temperature — The block uses a temperature that is independent of the circuit temperature when the Model temperature dependence using parameter in the Temperature settings of the SPICE NIGBT block is set to Fixed temperature. For this model, the block sets T equal to TFIXED.

• Device temperature — The block uses a temperature that depends on circuit temperature when the Model temperature dependence using parameter in the Temperature settings of the SPICE NIGBT block is set to Device temperature. For this model, the block defines temperature as

$T={T}_{C}+TOFFSET$

where:

• TC is the circuit temperature.

If there is not an Environment Parameters block in the circuit, TC is equal to 300.15 K.

If there is an Environment Parameters block in the circuit, TC is equal to the value that you specify for the Temperature parameter in the SPICE settings of the Environment Parameters block. The default value for the Temperature parameter is 300.15 K.

• TOFFSET is the offset local circuit temperature.

Ports

Refer to the figure for port locations. Conserving

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Electrical conserving port associated with the IGBT gate terminal.

Electrical conserving port associated with the IGBT collector terminal.

Electrical conserving port associated with the IGBT emitter terminal.

Parameters

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Dimensions

Gate-drain overlap area. The value must be greater than 0.

Area of the device. The value must be greater than 0.

Number of parallel transistors the block represents. The value must be an integer greater than 0.

General

Mobility of the electrons.

Mobility of the hole.

Doping of the base.

MOSFET

Factor of the triode region.

The derivative of the drain current with respect to the gate voltage. The value must be greater than or equal to 0

Threshold voltage.

Transverse field factor.

BJT

Width of the metallurgical base.

Density of the emitter saturation current.

Avalanche uniformity factor.

Avalanche multiplication exponent.

Capacitance

Gate-source capacitance per unit area.

Gate-drain oxide capacitance per unit area.

Gate-drain overlap depletion threshold.

Whether to specify initial condition.

Initial condition voltage ICVGE.

Dependencies

To enable this parameter, set Specify initial condition to Yes.

Initial condition voltage ICVCE.

Dependencies

To enable this parameter, set Specify initial condition to Yes.

Temperature

Options for modeling the transistor temperature dependence:

• Device temperature — Use the device temperature to model temperature dependence.

• Fixed temperature — Use a temperature that is independent of the circuit temperature to model temperature dependence.

Transistor simulation temperature. The value must be greater than 0 K.

Dependencies

To enable this parameter, set Model temperature dependence using to Fixed temperature.

Temperature at which the transistor parameters are measured. The value must be greater than 0 K.

Amount by which the transistor temperature differs from the circuit temperature.

Dependencies

To enable this parameter, set Model temperature dependence using to Device temperature.

 Hefner, A.R. and Diebolt, D.M. An experimentally verified IGBT model implemented in the Saber circuit simulator. IEEE transactions on Power Electronics 9, no. 5 (September 1994): 532-42. https://doi.org/10.1109/63.321038.

 Hefner, A.R., Jr. Semiconductor measurement technology: INSTANT - IGBT Network Simulation and Transient ANalysis Tool. U.S. Department of Commerce/Technology Administration, National Institute of Standards and Technology. 1992.