The motor control algorithm generates the pulse width modulation (PWM) signals to control the motor through inverter. In some cases, the PWM signals can be incorrect due to improper switching frequency, wrong interrupt and PWM generation configurations, or error in the duty cycles. Incorrect PWM signals result in improper switching of the inverter.
Use an oscilloscope to verify that the generated PWM signals has the expected switching frequency. In embedded targets, configuration of the PWM module depends on factors such as target hardware and clock frequency. For example, you can use these equations to calculate PWM_Counter_Period for Texas Instruments™ C2000 targets that have the ePWM module configured to work with the Up-Down counting mode:
CPU_frequency (Hz) = 200e6
PWM_frequency (Hz) = 20e3
PWM_Counter_Period (PWM timer counts) = CPU_frequency/ PWM_frequency/ 2
Ensure that you feed a correct PWM duty cycle to the switching device (for example, MOSFET or IGBT). PWM generation depends on these active-high and active-low configurations:
Active high — 25% duty results in 25% on-time for upper leg MOSFET or IGBT (recommended).
Active low — 25% duty results in 75% on-time for upper leg MOSFET or IGBT.
In addition, check if there is any inversion of the PWM signal between the target and MOSFET due to the gate driver or isolator circuit (25% gate pulse must be 25% on-time by the driver chip).
Majority of the controller algorithms are designed to work with the ADC-PWM synchronization for advantages like current sensing, reduced EMI/EMC interference.
ADC sampling begins with the SOC event. In some cases, for example, when sensing the current through the shunt resistors, ADC sampling requires synchronization with the bottom leg switches. In this case, verify that the SOC event is configured correctly with the ADC-PWM interrupt synchronization. This also results in reduced EMI/EMC noise in the sampling because ADC conversion happens outside the PWM transition. For more information, see Task Scheduling in Target Hardware.
Verify if the PWM duty is updated or refreshed in synchronization with the PWM module. To implement a robust control, it is a good practice to timely refresh the PWM duty (for example, once in Tpwm, preferably before Tpwm/ 2).
Check the datasheet of the PWM driver circuit for support at the 0% duty and 100% duty limits. For functional safety, it is a good practice to limit the maximum duty cycle somewhere between 95 and 98% by setting the corresponding value in the DQ Limiter block.
Verify that the hardware uses the correct PWM generation configuration. For example, BoostXL-DRV8305 supports 3-PWM mode, 6-PWM mode, and 1-PWM mode.
Check if there are dead bands introduced by the motor driver board. Consider this while generating dead bands from the PWM module.
Determine the maximum possible switching frequency for the inverter and driver from the device datasheets. Ensure that the model does not exceed this value.