TLM Generation Algorithms

The algorithm you use to generate the TLM component can be made of any combination of Simulink^® blocks that can generate C code. These blocks generally belong to a subsystem. Simulink Coder™ software generates ANSI^® C code from those blocks that HDL Verifier™ software then customizes with the settings specified using the TLM component generator to create the files that make up the virtual platform model. For an example of how this process works, see the following illustration.

Note

This feature requires the ASIC Testbench for HDL Verifier add-on.