Subsystem Guidelines and Limitations
Most subsystems that can be converted to C code are suitable for generating a TLM component. When you are considering a subsystem for TLM generation, keep in mind the following limitations:
Simulink® subsystem limitations for TLM generation:
Same limitations as the Embedded Coder® target if you are using Embedded Coder. If you are using Simulink Coder™ license, then Simulink Coder limitations are the ones that apply.
Bus data type not supported
Variable-size signals not supported
Simulink subsystem limitations tor TLM testbench generation:
Composite Simulink signal types not supported (e.g., buses, no-contiguous memory mux block outputs)
Multirate subsystems are not supported (however, constants are supported)
Complex signals are not supported
Subsystems with “action” ports are not supported (e.g., triggered, enabled, if Action, switch case Action)
SystemC/TLM generated component limitations:
TLM simple target socket (with blocking and debug interfaces) using Generic Payload
TLM target only (no TLM initiator generation)
32-bit bus width only (address align on 4 bytes)
No byte enable
No endianess option
No streaming
No DMI
Generic Payload extensions ignored
Note
This feature requires the ASIC Testbench for HDL Verifier add-on.