Generate HDL and HLS Code from a High Dynamic Range Imaging Algorithm
R2026bThis example shows how to generate HDL and HLS code from a MATLAB® function that implements a high dynamic range (HDR) imaging algorithm.
Note
This example requires the Image Processing Toolbox™.
High dynamic range imaging combines multiple exposures of the same scene to produce an image that captures detail in both the brightest and darkest regions. The algorithm in this example takes short-exposure and long-exposure images, applies luminance lookup tables (LUTs) to each image, and merges the results into a single HDR image. Photography, surveillance, and automotive vision systems use this technique where a single exposure cannot capture the full intensity range of a scene.
Examine the MATLAB Design and Test Bench
Set up the MATLAB function and test bench for this example. In the MATLAB Command Window, enter:
mlhdlc_demo_setup("mlhdlc_hdr");MATLAB function
Test bench
Short-exposure and long-exposure input images
<model>_runme.mscript, which includes the commands to generate HDL and HLS code
The MATLAB function, mlhdlc_hdr, processes one pixel at a time.
It accepts luminance and chrominance channel values from both exposures, two constant LUT
arrays, and pixel validity and coordinate signals. The function maps each luminance value
through its corresponding LUT, sums the two mapped values to produce the HDR luminance,
and averages the chrominance channels. It outputs the merged HDR pixel along with the
forwarded validity and coordinate signals.
To view the function, enter:
open mlhdlc_hdr.m;The test bench file, mlhdlc_hdr_tb, verifies the behavior of the
MATLAB function by reading short-exposure and long-exposure PNG images, converting them to
YIQ (luminance, in-phase, quadrature) color space, streaming each pixel through the
design, and reconstructing the HDR output image. To view the test bench,
enter:
open mlhdlc_hdr_tb.m;The example also includes mlhdlc_hdr_short.png and
mlhdlc_hdr_long.png, which are the short-exposure and long-exposure
input images used by the test bench.
Simulate the Design
To check for run-time errors, simulate the design by running the test bench. In the MATLAB Command Window, enter:
mlhdlc_hdr_tb;
Generate HDL Code
The mlhdlc_hdr_runme script specifies the target files,
enables the settings required for this example, and generates HDL code.
The script specifies the MATLAB function and test bench, then creates a fixed-point
configuration object by using the coder.config function. It associates
the test bench with the configuration object and adds a function approximation for the
exp
function.
designName = "mlhdlc_hdr"; designTB = "mlhdlc_hdr_tb"; fixptCfg = coder.config("fixpt"); fixptCfg.TestBenchName = designTB; mathFcnGenCfg = coder.approximation("exp"); mathFcnGenCfg.NumberOfPoints = 1024; mathFcnGenCfg.InterpolationDegree = 0; fixptCfg.addApproximation(mathFcnGenCfg);
The script creates an HDL configuration object and associates the test bench.
isCodingForHDL = true;
isCodingForStratusHLS = false;
isCodingForVitisHLS = false;
cfg = coder.config("hdl");
cfg.TestBenchName = designTB;The script then generates code:
codegen("-float2fixed", "fixptCfg", "-config", "cfg", designName, ... "-launchreport");
Run the Script
First, modify the mlhdlc_hdr_runme script. The script disables
synthesis by default. Set the value for the SynthesizeGeneratedCode
property to
true:
cfg.SynthesizeGeneratedCode = true;
Update the settings for your synthesis tool:
cfg.SynthesisTool = "Xilinx Vivado"; cfg.SynthesisToolChipFamily = "Artix7"; cfg.SynthesisToolDeviceName = "xa7a100t"; cfg.SynthesisToolPackageName = "csg324"; cfg.SynthesisToolSpeedValue = "-1I";
Then, generate code by running the script:
mlhdlc_hdr_runme
After code generation completes, the report opens. Examine the generated HDL code in the report.
Generate HLS Code
The mlhdlc_hdr_runme script can also generate HLS code. If
isCodingForHDL is false, the script configures the
HDL configuration object for an HLS code generation
workflow:
cfg.Workflow = "High Level Synthesis";
cfg.GenerateHDLTestBench = true;
cfg.SimulateGeneratedCode = true;The script sets the synthesis tool to AMD® Vitis® HLS:
cfg.SynthesisTool = "Xilinx Vitis HLS"; cfg.SynthesisToolChipFamily = "Artix7"; cfg.SynthesisToolDeviceName = "xa7a100t"; cfg.SynthesisToolPackageName = "csg324"; cfg.SynthesisToolSpeedValue = "-1I";
Run the Script
To generate HLS code instead of HDL code, modify the
mlhdlc_hdr_runme script. Set the flags so that the script targets
an HLS code generation
workflow:
isCodingForHDL = false; isCodingForStratusHLS = false; isCodingForVitisHLS = true;
The script disables synthesis by default. Set the value for the
SynthesizeGeneratedCode property to
true:
cfg.SynthesizeGeneratedCode = true;
Depending on your synthesis tool, set one of these flags to
true:
isCodingForStratusHLS = false; isCodingForVitisHLS = true;
Depending on your synthesis tool, update these synthesis tool settings:
if isCodingForStratusHLS cfg.SynthesisTool = "Cadence Stratus HLS"; elseif isCodingForVitisHLS cfg.SynthesisTool = "Xilinx Vitis HLS"; cfg.SynthesisToolChipFamily = "Artix7"; cfg.SynthesisToolDeviceName = "xa7a100t"; cfg.SynthesisToolPackageName = "csg324"; cfg.SynthesisToolSpeedValue = "-1I"; end
Then, generate code by running the script:
mlhdlc_hdr_runme
After code generation completes, the report opens. Examine the generated HLS code in the report.