Deep Learning HDL Toolbox™ provides functions and tools to prototype and implement deep learning networks on FPGAs and SoCs. It provides pre-built bitstreams for running a variety of deep learning networks on supported Xilinx® and Intel® FPGA and SoC devices. Profiling and estimation tools let you customize a deep learning network by exploring design, performance, and resource utilization tradeoffs.
Deep Learning HDL Toolbox enables you to customize the hardware implementation of your deep learning network and generate portable, synthesizable Verilog® and VHDL® code for deployment on any FPGA (with HDL Coder™ and Simulink®).
Learn the basics of Deep Learning HDL Toolbox
Estimate performance of series networks. Profile and retrieve inference results from target devices using MATLAB®
Configure, build, and generate custom bitstreams and processor IP cores, estimate and benchmark custom deep learning processor performance
Generate the deep learning (DL) processor IP core by using HDL Coder and Deep Learning HDL Toolbox. Integrate the generated deep learning (DL) processor IP core into your system design manually or by using HDL Coder and IP core generation workflow
Calibrate, validate, and deploy quantized pretrained series deep learning networks
Support for third-party hardware such as Intel and Xilinx FPGA boards