MATLAB Examples

Troubleshoot Conversion of Simscape DC Motor Control to HDL-Compatible Simulink Model

This example shows how to modify a Simscape™ plant model to generate an HDL-compatible Simulink™ model with HDL Coder™. HDL code is then generated from this Simulink model.



The Simscape plant model is converted to an HDL compatible Simulink model by using the Simscape HDL Workflow Advisor. To run the Advisor, you invoke the sschdladvisor function for the model.

The Simscape HDL Workflow Advisor generates an HDL Implementation model from which you can generate HDL code. Before you generate the implementation model, make sure make sure that the Simscape plant model is compatible for generation of the implementation model using the Simscape HDL Workflow Advisor. For more information, see Generate HDL Code from Simscape Models.

In some cases, the Simscape plant model might not be compatible for generation of the implementation model by using the Simscape HDL Workflow Advisor. For HDL compatibility, you can modify the Simscape plant model, and then run the Simscape HDL Workflow Advisor.

This example illustrates the DC Motor Control plant model. The model contains a nonlinear Friction block. You can use the approach in this example to convert Simscape models with few nonlinear blocks to a HDL-compatible Simulink model.

DC Motor Control Model

This is a physical model developed in Simscape. The model contains nonlinear elements and needs certain modifications for generating the implementation model.


DC motor control is used as a speed control structure. A PWM controlled four-quadrant Chopper feeds the DC motor. The DC motor consists of Rotational Electromechanical Converter, Resistor, Inductance, Friction block and an Inertia block. The control subsystem includes the outer speed-control loop, the inner current-control loop, and the PWM generation. To see how the models work, simulate the model.


To convert Simscape plant models into HDL-Compatible implementation model, make sure that the model does not contain nonlinear components or blocks.

Make DC Motor Model HDL-Compatible

To make the Simscape plant model HDL-Compatible:

1. To verify the presence of nonlinear blocks in Simscape plant model, enter:

Found network that contains nonlinear equations in the following blocks:
    'pe_dc_motor_control_original/DC Motor/Friction'

The number of linear or switched linear networks in the model is 0.
The number of nonlinear networks in the model is 1.

ans =

  1×1 cell array

    {'pe_dc_motor_control_original/DC Motor/Friction'}

The Simscape plant model has a nonlinear block, which is the Friction block. For HDL compatibility, remove the Friction block.

delete_block('pe_dc_motor_control_original/DC Motor/Friction')

2. Reduce the stop time of this model in Model configuration Parameters to 1s.


3.Excluding the inputs and outputs, enclose all other blocks at the top level of the DC motor control model inside a subsystem. Attach Rate Transition blocks at the inputs TLoad and rpmReq. Save the changes into a new model as pe_dc_motor_control_modif.


4. To see the simulation results after you modify the model, enter:


5. To view results, open the Scope block:


Run Simscape HDL Workflow Advisor and Verify Simulation Results

To open the Simscape HDL Workflow Advisor, run the sschdladvisor for your model. sschdladvisor('pe_dc_motor_control_modif').

To generate the implementation model, in the Simscape HDL Workflow Advisor, keep all default settings, and then run the tasks. You see a link to the model in the Generate implementation model task. To open the implementation model, enter:


Simulate Implementation Model and Generate HDL code

The sample time of the Implementation model is related to the sample time of modified Simscape plant model and the number of iterations specified in Simscape HDL Workflow Advisor. An incorrect setting of sample time can result in failure to simulate the implementation model. The sample time of modified plant model is Ts. The number of iterations is five. Hence the sample time of Implementation model is Ts/5. To set the sample time, enter:

set_param('gmStateSpaceHDL_pe_dc_motor_control_modif','SolverType', ...

To simulate the model, run this command, and then open the Scope block to see the results.


From the Scope block, you can verify that the output generated by the modified Simscape plant model matches the output generated by the implementation model.

Generate HDL Code and Validation Model

You can now generate HDL code for the implementation model. Before you can generate HDL code, you must select the Treat each discrete rate as a separate task check box and set Single task rate transition to error.

set_param('gmStateSpaceHDL_pe_dc_motor_control_modif','EnableMultiTasking', 'on', ...
                                        'SingleTaskRateTransMsg', 'error')

It is recommended to enable generation of the validation model. The validation model compares the output of the generated model after code generation to the modified Simscape plant model. To learn more, see Generated Model and Validation Model.

To save validation model generation settings on your Simulink model, enter:

modelname = 'gmStateSpaceHDL_pe_dc_motor_control_modif';
hdlset_param(modelname, 'TargetDirectory', 'C:/Temp/hdlsrc')
hdlset_param(modelname, 'GenerateValidationModel', 'on');

To generate HDL code, enter:

makehdl('gmStateSpaceHDL_pe_dc_motor_control_modif/HDL Subsystem')

By default, HDL Coder generates VHDL code. To generate Verilog code, enter:

makehdl('gmStateSpaceHDL_pe_dc_motor_control_modif/HDL Subsystem', 'TargetLanguage', 'Verilog')

The generated HDL code and the validation model is saved in C:/Temp/hdlsrc folder. The generated code is saved as HDL_Subsystem_tc.vhd.

Optionally, you can:

  1. Verify the model generated after HDL code generation by using the validation model. To open the validation model, click the link to gm_gmStateSpaceHDL_pe_dc_motor_control_modifif_vnl.slx. when you generate code.
  2. Deploy the generated HDL code on Speedgoat FPGA I/O boards or other target platforms. For more information, see Deploy Simscape plant models to Speedgoat FPGA IO modules.