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Model Direct Conversion Receiver

This example shows you how to model a direct conversion receiver. Direct conversion receivers are sensitive to second-order intermodulation products because they transfer the RF signal directly to baseband. The RF system consists of a low-noise amplification (LNA) stage, a direct-conversion stage, and a final amplification stage.

System Specifications

Open the model to inspect the direct conversion receiver.

open_system("ex_simrf_dc_model")
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The model runs according to the following environment settings:

In the Configuration block, the Fundamental tones parameter specifies the carriers in the RF Blockset™ environment:

  • fRF = fLO, the carrier of the RF and the local oscillator.

  • fBL, the blocker carrier

The RF Blockset environment always simulates the 0 Hz carrier, regardless of whether the RF Blockset parameters block specifies it.

In the Solver Configuration dialog box, the Use local solver box is selected. This setting causes the RF Blockset environment to simulate with a local solver with the following settings:

  • Solver type is Trapezoidal rule .

  • Sample time is sample_time, defined as 1.25e-4 in the model initialization function.

Since the model uses a local solver, the global solver settings do not affect the simulation within the RF Blockset environment. For more information on global and local solvers, see Choosing Simulink and Simscape Solvers

To maximize performance, set Fundamental tones and Harmonic order parameters to specify the simulation frequencies explicitly in the Configuration block:

  • fRF = fLO, the carrier of the RF and the local oscillator, appears as a fundamental tone.

  • fBL, the blocker carrier, appears as a fundamental tone.

A carrier of 0 Hz, representing the passband signal, is included in the set of first-order harmonics of both fundamental tones. Therefore, setting Harmonic order to 1 is sufficient to ensure that this frequency appears in the simulation frequencies. This minimal value for the harmonic order ensures a minimum of simulation frequencies.

Solver conditions and noise settings are also specified for the Configuration block:The Solver type is set to auto. For more information on choosing solvers, see Configuration or see Choosing Simulink and Simscape Solvers.

The Sample time parameter is set to sample_time , which is equal to 1/(mod_freq*64). This setting ensures a simulation bandwidth 64 times greater than the envelope signals in the system.

The Simulate noise check box is checked to include noise parameters during simulation.

View Simulation Output

Four Spectrum Analyzer blocks from Circuit Envelope Utilities sublibrary are used to visualize the outputs.

sim("ex_simrf_dc_model")
%

  • The RF Display plot shows the power level of the RF signal. The power level of the RF is about 100 dBm.

  • The Blocker Display plot shows the power spectrum centered at the carrier fBL. The power level of the blocker is about 90 dB higher than the signal power of the RF.

  • The In-Phase Output plot shows the power spectrum of the in-phase signal at baseband. In the figure, DC power is a direct result of the blocker and the IP2 in the mixers.

  • The Quadrature Output plot shows the power spectrum of the quadrature signal at baseband.

Modeling IMD in System-Level Components

The IP2 and IP3 parameters specify the second- and third-order intercept points of Amplifier and Mixer blocks:

  • The amplifiers have infinite IP2 and IP3, so the amplifiers are linear.

  • IP2 of the mixer is 15 dB

Amplifier and Mixer components have specified gains and noise figures:

  • The gain and noise figure in the LNA stage are 25 dB and 6 dB, respectively.

  • The gain and noise figure in the mixing stage are 10 dB and 10 dB. The Input impedance parameters of the two mixers are both 100 ohms, which sum in parallel to a resistance of 50 ohms to match the output impedance of the LNA.

  • The gain and noise figure in the final amplification stage are 20 dB and 15 dB, respectively.

To calculate RF system noise figure, use the Friis equation:

F_sys = F1 + F2-1/G1 + F3-1/G1G2 + ... + Fn-1/G1G2...Gn-1

Where Fn and Gn are the noise figure and gain of the nth stage.

Examining DC Impairments

In addition to intermodulation distortion from IP2, direct-conversion receivers are subject to additional DC impairments. For example, coupling between mixer input and local oscillator (LO) ports causes self-mixing of the LO. For more information, see Executable Specification of Direct Conversion Receiver.

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